Improved Architectures for Fused Floating Point Add-Subtract Unit

نویسندگان

  • Pooja Potdar
  • S. S. Tamboli
چکیده

The fused floating point add-subtract unit is useful for digital signal processing (DSP) applications Such as fast Fourier transform (FFT) & discrete cosine transform (DCT) butterfly operations. To improve the performance of fused floating point addsubtract unit, a dual path algorithm& pipelining algorithms are useful .The designs are implemented for both single and double precision. The fused floating point add-subtract unit saves area and power consumption compared to discrete floating point addsubtract unit. The dual path design reduces latency compared to discrete design with area and power consumption between discrete and fused design. The fused dual path floating point add-subtract unit can be split into two pipeline stages, since latencies of two pipeline stages will be fairly well balanced.

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تاریخ انتشار 2015